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FAQ1: What is Controller Area Network (CAN)?
FAQ2: Who developed CAN?
FAQ3: How does CAN work?
FAQ4: What are the features of CAN?
FAQ5: Who is manufacturing CAN chips?
FAQ6: What is CMSA/CD-NDBA?
FAQ7: What is CAN higher level protocol?
FAQ8: What is bit arbitration?
FAQ9:What is BasicCAN and FullCAN?
FAQ10:What is Standard CAN and Extended CAN?
FAQ11:What is the differences between CAN2.0A and CAN2.0B?

What is Controller Area Network (CAN)?

Controller Area Network (CAN), as its name implies, is the network established among microcontrollers. It is a two-wire high-speed network system which was firstly established to overcome the problems (wire harness, communication) faced in automobiles.

CAN can be theoretically linked up to 2032 devices (assuming one node with one identifier) on a single network. However due to the practical limitation of the hardware (transceiver), it can link up to 110 nodes (with 82C250, Philips) on a single network. CAN offers high-speed communication up to 1 Mbits/sec, thus allowing real-time control. In addition, the Error Confinement and the error detection features make it more reliable in noise critical environments.

Who developed CAN?

CAN was first developed by Robert Bosch GmbH, Germany in 1986 when they were requested to develop a communication system between three ECU's (electronic control units) in a vehicle by Mercedes. They found that UART is no longer suitable in this situation because it is used in point-to-point communication. The need for a multi-master communication system became imperative. The first CAN silicon was then fabricated in 1987 by Intel. 

In 1993, CAN became the ISO 11898 standard "Road Vehicles - Interchange of Digital Information - Controller Area Network (CAN) for high-speed Communication". Review was continuously carried out and first amendment was carried in 1995.

How does CAN work?

CAN transmits signals on the CAN bus which consists of a CAN-High and CAN-Low. These 2 buses are carrying signals opposite to each other (to overcome noise interruption that simultaneously interfere on the bus). The voltage level corresponds to recessive (logical "1") is 2.5 Volts and dominant (logical "0") are 3.5 Volts for CAN-High and 1.5 Volts for CAN-Low respectively. The voltage level on the CAN bus is recessive when the bus is idle. 

CAN uses bit arbitration technique in which the priority of accessing the bus is determined by the 11-bit identifier. Due to the architecture that "dominant" bit will always override "recessive" bit, the node with lower identifier (the identifier will be first broadcasted on the CAN bus) will have higher accessing priority. This is part of the contribution from CSMA/CD-NDBA. 

What are the features of CAN?

CAN's features include:

1.Low cost.
2.Extremely robust.
3.High speed (up to 1 MBits/sec).
4.Reliable. Error handling and Error Confinement.
5.Automatic retransmitting of the faulty data.
6.Automatic disconnect of nodes which are suspected to be physically faulty.
7.Functional Addressing, i.e. no source/destination address, the data are "broadcasted" on the network.

Who is manufacturing CAN chips?

Below is the summary of the main CAN chips makers:

Vendor Product Type  Remark
Fujitsu F2MC-16L

2.0B, Itegrated

16 bit
Hitachi

HCAN-1

H8/300H

SuperH

Stand-alone

Integrated

Integrated

-

-

-

Intel

82527

87C196CA/CB

2.0B. FullCAN. Stand-alone.
Integrated
-
16-bit version
Intermetall CCU 3010E Integrated. -
Mitsubishi M37630 E4/M4 2.0B, Integrated 8 bit
Motorola
MC68HC05XX
MC68HC08AZ
MC68376
2.0A, Integrated.
2.0B, Integrated.
2.0B, Integrated.
8 bit, XX = 4K, 16K, or 32K
8 bit, 16K, 24K, or 32K
32 bit
National Semiconductors
COP87L88EB
COP87L89EB
CR16-CAN

DS36C250

2.0B, BasicCAN, Integrated
Integrated
2.0B, Integrated.2.0B

CAN transceiver

8 bit
-
16 bit flash

-

NEC uPD78F0948 2.0B. 8 bit Integrated Many variations available
Philips Semiconductors SJA 1000
8XC592/8XCE598
XA-C3
P82C150
PCA82C250/251
PCA82C252
2.0B. BasicCAN. Stand-alone.
2.0A, Integrated.
2.0B, Integrated.
1.0. Serial Link I/O.
CAN Controller Interface.
Fault-Tolerant CAN transceiver
C200 was replaced by SJA 1000.
Will be replaced by XA-G3.
16-bit.
Discontinued.
C250 will be replaced by C251
Low speed, up to 125Kbps.
SGS Thomson ST10F167 Integrated. 16 bit
Infineon (Siemens Semiconductors) SAE81C90/91
SABC167CR
SAB515C
2.0B. FullCAN. Stand-alone.
2.0B. FullCAN. Integrated.
2.0B. FullCAN. Integrated.
2.0B Passive
16 bit
8 bit
Temic TSC8051A11 Integrated. 8 bit
Texas Instruments TMS370E08D55

UN5350

2.0B. Integrated.

CAN Transceiver

-

Pin Compatible with 82C251

Toshiba TMP88PP87
TMP93PW50
2.0B, Integrated.
2.0B, Integrated.
8 bit
16 bit

What is CSMA/CD-NDBA?

CSMA/CD-NDBA stands for Carrier Sense Multiple Access with Collision Detect. Majority of the low cost communication systems use baseband transmission techniques. The problem arises when many nodes are trying to transmit at one time, which results in a collision. With CSMA/CD the accessing of the bus is done by sensing (listening) the carrier on the bus (carrier sense), and transmit only when the bus is idle. In this case it allows multiple nodes to be hooked on the same network. When a collision is detected, all nodes which initiate the transmission will pull back to "listen" again until random time passed before the retransmission. However this technique still cause some delay in a heavily loaded bus. To overcome this problem, NDBA technique is included. NDBA stands for Non-Destructive Bit Arbitration. NDBA guarantees the bit sent on the bus would not be destroyed when there is a collision. In CAN point of view, dominant bit (logical "0") will override recessive bit (logical "1"), the resultant bit on the bus will appear to be dominant, thus it would not be destroyed and can continue sending the remaining bits. This can be achieved only if the bit representation is Non-Return to Zero (NRZ).

What is CAN higher level protocol?

CAN higher level protocol is the protocol that implemented on top of the current CAN protocol (physical layer and data-link layer). The higher level protocol utilise CAN's physical and data link layers as a base for the developed application layer. Many systems, e.g. automotive use a propriety application layer, but in many industries, it is not cost effective. Several organisations have developed standardised open application layers to ensure ease of system integration.

Some available CAN higher level protocols are:

DeviceNet by the Open DeviceNet Vendor Association.
Smart Distributed System (SDS) by Honeywell.
CAN Application Layer (CAL) by CiA.
CANOpen (subset of CAL) by CiA.
CANKingdom by Kvaser in Sweden.

What is bit arbitration?

The nodes check that the bus is idle before they transmit a signal. It is "first come first serve" basis. Whichever nodes get on the bus first will be able to transmit its signal. When collision occurs, i.e. when two or more nodes are transmitting at the same time, the node with the lowest ID will have higher priority to access the bus. The nodes that lose arbitration will immediately retransmit there signal when the higher priority node has completed its transmission.

What is BasicCAN and FullCAN?

Generally, the difference between FullCAN and BasicCAN is the Object Storage function. BaiscCAN has architecture similar to a simple UART, it has typically one transmit buffer and two receive buffers, and most of the manipulation of the data has to be handled by the CPU because the CAN chip handles only the transmitting and receiving of the data (and the error handling). The CPU has to request the transmitting or acknowledge the receiving of the data through the interrupt flags. This will burden the CPU and take up much of the CPU time. Whilst FullCAN has its own storage area on chip. The CAN controller has its own Acceptance Filtering Mask on chip. It can thus determine which frames are to be received by examining the identifiers. The CPU in this case will only receive the valid (wanted) frames and hence improve the performance of the CPU. Therefore FullCAN is more suitable for high-speed performance.

However the implementation of FullCAN is not as simple as BasicCAN. Since FullCAN can manipulate and update the data in the buffer by itself, the synchronisation (or concurrency) may be difficult to maintain. The data written to the buffer by the CPU may be overwritten by the CAN controller and hence appears to be invalid.

Nevertheless, the CAN chips manufactured nowadays implement both architectures, i.e. it functions like a UART but has its own object storage function (acceptance filtering mask). Therefore it is difficult to differentiate between FullCAN and BasicCAN.

What is Standard CAN and Extended CAN?

In Standard CAN the identifier is 11-bits long and in Extended CAN the identifier is 29-bits long. As specified in CAN protocol version 2.0, a CAN controller which complies to V2.0A must have 11-bit identifier. Whilst in V2.0B, it can be either 11-bit or 29-bit. With V2.0B active, a CAN controller may transmit and receive both standard and extended frames. With V2.0B passive, a CAN controller may transmit and receive standard frames, and ignore the extended frame without error.

What is the differences between CAN2.0A and CAN2.0B?

This is only the alias of Standard CAN (2.0A) and Extended CAN (2.0B). See FAQ  "What is Standard CAN and Extended CAN?".

 

 

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Last modified: 02 February, 2001 08:24 -0000